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| FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET August 2006 FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET Features Q1: N-Channel Max rDS(on) = 5 at VGS = 4.5V, ID = 200mA Max rDS(on) = 7 at VGS = 2.5V, ID = 175mA Max rDS(on) = 9 at VGS = 1.8V, ID = 150mA Q2: P-Channel tm General Description This Complementary N & P-Channel MOSFET has been designed using Fairchild Semiconductor's advanced Power Trench(R) process to optimize the rDS(ON) @ VGS=2.5V and specify the rDS(ON) @ VGS = 1.8V. Applications Level shifting Power Supply Converter Circuits Load/Power Switching Cell Phones, Pagers Max rDS(on) = 8 at VGS = -4.5V, ID = -150mA Max rDS(on) = 12 at VGS = -2.5V, ID = -125mA Max rDS(on) = 15 at VGS = -1.8V, ID = -100mA ESD protection diode (note 3) RoHS Compliant 6 5 4 S2 4 3 D2 G2 5 2 G1 1 2 3 D1 6 1 S1 MOSFET Maximum Ratings TC = 25C unless otherwise noted Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Power Dissipation (Steady State) Operating and Storage Junction Temperature Range (Note 1a) (Note 1b) (Note 1a) Q1 20 12 200 1000 625 446 -55 to 150 Q2 -20 8 -150 -1000 Units V V mA mW C Thermal Characteristics RJA RJA Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient (Note 1a) (Note 1b) 200 280 C/W Package Marking and Ordering Information Device Marking F Device FDY4001CZ Package SC89-6 Reel Size 7" Tape Width 8mm Quantity 3000units (c)2006 Fairchild Semiconductor Corporation FDY4001CZ Rev. B 1 www.fairchildsemi.com FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25C unlessotherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage ID = 250A, VGS = 0V ID = -250A, VGS = 0V ID = 250A, referenced to 25C ID = -250A, referenced to 25C VDS = 16V, VDS =0V VDS = -16V, VDS =0V VGS = 12V, VDS = 0V VGS = 4.5V, VDS = 0V VGS = 8V, VDS = 0V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q1 Q2 20 -20 14 -15 1 -3 10 1 10 V mV/C A A On Characteristics (note 2) VGS(th) VGS(th) TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250A VGS = VDS, ID = -250A ID = 250A, referenced to 25C ID = -250A, referenced to 25C VGS = 4.5V, ID = 200mA VGS = 2.5V, ID = 175mA VGS = 1.8V, ID = 150mA VGS = 1.5V, ID = 20mA VGS = 4.5V, ID = 200mA,TJ = 125C VGS = -4.5V, ID = --150mA VGS = -2.5V, ID = -125mA VGS = -1.8V, ID = -100mA VGS = -1.5V, ID = -30mA VGS = -4.5V, ID = -150mA,TJ =125C VDS = 5V, ID = 200mA VDS = -5V, ID = -150mA Q1 Q2 Q1 Q2 0.6 -0.65 -1.0 2.8 -3 5 7 9 10 7 8 12 15 20 12 1.1 0.7 1.5 -1.5 V mV/C Q1 rDS(on) Drain to Source On Resistance Q2 gFS Forward Transconductance Q1 Q2 S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance Q1 VDS = 10V, VGS = 0V, f = 1MHz Q2 VDS = -10V, VGS = 0V, f = 1MHz Q1 Q2 Q1 Q2 Q1 Q2 60 100 20 30 10 15 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source Gate Charge Gate to Drain "Miller"Charge Q1 VDD= 10V, ID = 1A, VGS= 4.5V, Rg = 6 Q2 VDD= -10V, ID = -0.5A, VGS= -4.5V, Rg = 6 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 6 6 8 13 8 8 2.4 1 0.8 1.0 0.16 0.2 0.26 0.3 12 12 16 23 16 16 4.8 2 1.1 1.4 ns ns ns ns nC nC nC Q1 VDS= 10V, ID = 200mA, VGS= 4.5V Q2 VDS= -10V, ID = -150mA, VGS= -4.5V 2 FDY4001CZ Rev. B www.fairchildsemi.com FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Volt- VGS = 0V, IS = 150mA (Note 2) age VGS = 0V, IS = -150mA (Note 2) Reverse Recovery Time Reverse Recovery Charge Q1 IF = 200mA, di/dt = 100A/s Q2 IF = -150mA, di/dt = 100A/s Q1 Q2 Q1 Q2 Q1 Q2 0.7 -0.8 12 11 3 2 1.2 -1.2 V ns nC Notes: 1: RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RJA is determined by the user's board design. b) 280C/W when mounted on a minimum pad of 2 oz copper a) 200C/W when mounted on a 1 in2 pad of 2 oz copper Scale 1:1 on letter size paper 2: Pulse Test : Pulse Width < 300us, Duty Cycle < 2.0% 3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 3 FDY4001CZ Rev. B www.fairchildsemi.com FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET Typical Characteristics Q1 (N-Channel) 1 R D S(O N ), N O R M A LIZED DR AIN -SO UR CE ON -RESISTANC E VGS = 4.5V 3.5V 2.5V 3.0V ID , DRAIN CURRENT (A) 0.8 2.0V 0.6 1.8V 0.4 0.2 1.5V 0 0 0.25 0.5 0.75 1 VDS, DRAIN-SOURCE VOLTAGE (V) 3.4 3.2 3 2.8 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 VGS = 1.8V 2.0V 2.5V 3.0V 3.5V 4.5V 0.2 0.4 0.6 0.8 1 ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. 1.6 R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE Figure 2. Normalized on-Resistance vs. Drain Current and Gate Voltage. 1 R DS(ON), ON-RESISTANCE (OHM) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 o o ID = 200mA VGS = 4.5V ID = 100mA 1.4 1.2 1 TA = 125 C 0.8 TA = 25 C 0.6 -50 -25 0 25 50 75 100 125 150 1 2 3 4 5 TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized on-Resistance vs. Temperature. 1.5 Figure 4. On-Resistance vs. Gate-to-Source Votlage. 1 I S , REVERSE DRAIN CURRENT (A) VDS = 5V ID, DRAIN CURRENT (A) 1.2 TA = -55oC 125oC 25 C o VGS = 0V 0.1 TA = 125 C 0.01 25 C 0.001 o o o 0.9 0.6 -55 C 0.3 0 0.5 0.0001 1 1.5 2 2.5 3 0 0.2 0.4 0.6 0.8 1 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Source to Drain Diode Forward Voltage vs. Source Current and Temperature. 4 FDY4001CZ Rev. B www.fairchildsemi.com FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET Typical Characteristics Q1 (N-Channel) 5 V GS , GATE-SOURCE VOLTAGE (V) ID = 600mA 4 VDS = 5V 3 15V 10V 100 90 80 CA PA CITA NC E (pF) 70 60 50 40 30 20 10 Crss 0 4 8 12 16 20 Coss Ciss f = 1MHz VGS = 0 V 2 1 0 0 0.2 0.4 0.6 0.8 1 Qg, GATE CHARGE (nC) 0 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 10 Figure 8. Capacitance vs. Drain to source voltage. 30 P(pk), PEAK TRANSIENT POW ER (W) 25 20 15 10 5 0 0.0001 SINGLE PULSE RJA = 280C/W TA = 25C ID , DRAIN CURRENT (A) RDS(ON) LIMIT 1 1ms 10ms 0.1 VGS = 4.5V SINGLE PULSE RJA = 280oC/W TA = 25oC 0.01 0.1 100ms 10s 1s DC 1 10 100 0.001 0.01 0.1 1 10 100 1000 VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D=0.5 0.2 0.1 0.05 0.02 0.01 RJA(t) = r(t) * RJA RJA =280 C/W P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.1 0.01 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. 5 FDY4001CZ Rev. B www.fairchildsemi.com FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET Typical Characteristics Q2 (P-Channel) 1 5 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS= -4.5V -2.5V VGS=-1.5V -ID, DRAIN CURRENT (A) 0.8 -3.5V 0.6 -3.0V -2.0V 4 -1.8V 3 0.4 -1.8V 2 -2.0V -2.5V -3.0V -3.5V 0.2 -1.5V 0 0 0.5 1 1.5 -VDS, DRAIN TO SOURCE VOLTAGE (V) 2 1 -4.5V 0 0 0.2 0.4 0.6 -ID, DRAIN CURRENT (A) 0.8 1 Figure 1. On-Region Characteristics. Figure 2. Normalized on-Resistance vs. Drain Current and Gate Voltage. 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE RDS(ON), ON-RESISTANCE (OHM) ID = -0.15A VGS = -4.5V 2 ID = -0.075A 1.75 1.5 1.25 TA = 125oC 1 0.75 0.5 0.25 1.4 1.2 1 0.8 TA = 25 C o 0.6 -50 -25 0 25 50 75 100 o TJ, JUNCTION TEMPERATURE ( C) 125 150 0 2 4 6 8 -VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. Normalized on-Resistance vs. Temperature. Figure 4. On-Resistance vs. Gate-to-Source Voltage. 1 -IS, REVERSE DRAIN CURRENT (A) VDS = -5V 1 VGS = 0V -ID, DRAIN CURRENT (A) 0.8 0.1 0.6 0.01 TA = 125oC 0.4 TA = 125 C -55oC o 0.2 25oC 0.001 25oC -55oC 0 0.5 1.5 2 -VGS, GATE TO SOURCE VOLTAGE (V) 1 2.5 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) 1.4 Figure 5. Transfer Characteristics. Figure 6. Source to Drain Diode Forward Voltage vs. Source Current and Temperature. 6 FDY4001CZ Rev. B www.fairchildsemi.com FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET Typical Characteristics Q2 (P-Channel) 10 150 ID = -0.15A 125 -15V CAPACITANCE (pF) VDS = -5V 100 75 50 25 Crss 0 0 0.5 1 1.5 Qg, GATE CHARGE (nC) 2 2.5 -VGS, GATE-SOURCE VOLTAGE (V) f = 1 MHz VGS = 0 V 8 6 Ciss -10V 4 Coss 2 0 0 4 8 12 16 -VDS, DRAIN TO SOURCE VOLTAGE (V) 20 Figure 7. Gate Charge Characteristics. Figure 8. Capacitance vs. Drain to source voltage. 10 P(pk), PEAK TRANSIENT POWER (W) 10 SINGLE PULSE C/W RJA = 280 /W TA = 25 C -ID, DRAIN CURRENT (A) 8 1 100s RDS(ON) LIMIT 1ms 10ms 100ms 1s 10s DC 6 4 0.1 VGS = -4.5V SINGLE PULSE RJA = 280oC/W TA = 25oC 2 0.01 0.01 0.1 1 10 -VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIEN THERMAL RESISTANCE 1 D = 0.5 0.2 R JA(t) = r(t) * R JA RJA =280C /W P(pk) t1 t2 T J - T A = P * R JA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.1 0.1 0.05 0.02 0.01 0.01 0.0001 0.001 0.01 0.1 t 1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b.Transient thermal response will change depending on the circuit board design. 7 FDY4001CZ Rev. B www.fairchildsemi.com FDY4001CZ Complementary N & P-Channel PowerTrench(R) MOSFET Dimensional Outline and Pad Layout 1.70 1.50 6 4 0.50 0.30 0.15 0.50 1.20 BSC 1.70 1.55 1.25 1.80 1 (0.20) 3 0.30 0.50 1.00 0.60 0.56 0.18 0.10 0.55 LAND PATTERN RECOMMENDATION SEE DETAIL A 0.35 BSC 0.20 BSC 0.10 0.00 DETAIL A SCALE 2 : 1 NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO EIAJ SC89 PACKAGING STANDARD. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. 8 FDY4001CZ Rev. B www.fairchildsemi.com TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet SeriesTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM ACExTM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FAST(R) FASTrTM FPSTM FRFETTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyBoostTM TinyBuckTM TinyPWMTM TinyPowerTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UniFETTM UltraFET(R) VCXTM WireTM LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production Rev. I20 |
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